How are Microchips Made from Sand to Silicon

All chips start with a very simple raw material sand. Sand is primarily made up of silicon dioxide or silica. Silicon is the second most abundant element in the Earth’s crust but is only ever found as a compound with oxygen.

Separate silicon from silica sand for microchips

Complex chemical and physical processes are required to ensure that silicon crystals meet the high production standards that apply to chips to convert silica sand to silicon. The sand is combined with carbon and heated to an extremely high temperature to remove the oxygen. Several other steps are required to create the finished product, namely an extremely pure monocrystalline silicon ingot called a bull with only one impurity atom for every 10 million silicon atoms.

Silicon bulls are fabricated in a range of different diameters; the most common sizes are 150, 200, and 300 millimeters. Wafers with large diameters offer more space for chips. Extremely thin wafers are then cut from the silicon bulls using a special sewing technique, these wafers are the basic building blocks for subsequent chip production.

Silicon is a semiconductor, this means it can conduct electricity and also act as an insulator. Every silicon atom has four outer electrons, there are no free charge carriers as a result the pure monocrystalline silicon is non-conductive at room temperature. To allow it to become conductive, small quantities of specific atoms are added as impurities to the wafer. These impurity atoms must have several outer electrons that are either one more or one less than that of silicon.

Silicon is in the fourteenth group of the periodic table of elements, this means that elements in the thirteenth or fifteenth group have to be used in this process referred to as doping. Boron and Phosphorus atoms are the most suitable elements in these groups. They are very close to silicon on the periodic table and therefore have very similar properties. Phosphorus has five outer electrons when it is inserted into the silicon crystal lattice, the fifth phosphorus electrons can move freely, this means that the silicon phosphorus crystal is n-conductive.

In contrast boron atoms only have three outer electrons. When they are introduced into the silicon lattice, one silicon electron has nothing to bond to, this creates electron holes. The holes move through the crystal-like positively charged particles, making the material p-conductive.

Transistors are built on the P and N conductive layers that exist in a dazed wafer. Transistors are the smallest control unit in microchips. Their job is to control electric voltages and currents. Transistors are the most important components of electronic circuits. Every transistor on a chip contains p and n conductive layers made of silicon crystals. They also have an additional layer of silicon oxide which acts as an insulator. A layer of electrically conductive polysilicon is applied on top of this. Every transistor has three terminals, the middle one is attached to the gate which is the electrically conductive polysilicon. If an electrical charge is applied to only the two outer terminals electricity cannot flow as the transistor is blocked. If an additional charge is applied to the middle terminal electrons from the player are then pulled to the middle terminal and accumulate at the area bordering the silicon crystal and the insulating gate oxide. A channel forms underneath the gate between the islands of n conductive material. Electrons can now flow through this channel when the electric circuit is closed. In this way, the transistor can be switched back and forth between current and enable and disable between 0 and 1, on and off.

How these layers are created on a wafer

The process to manufacture chips from a wafer starts with the layout and design phase, highly complex chips are made up of billions of integrated and connected transistors and enabling sophisticated circuits such as microcontrollers and crypto chips to be built on a semiconductor surface measuring just a few square millimeters n size. The sheer number of components calls for an in-depth design process. This entails defining the functions of the chip simulating its technical and physical properties, testing its functionality, and working out the individual transistor connections.

Special design tools are used to draw up the plans for integrated circuits and develop a three-dimensional architecture of sandwich layers, this blueprint is transferred to photomasks.

Providing geometric images of the circuits. The photomasks are used as image templates during the subsequent chip fabrication process. To ensure that the microscopic structures of a chip are reproduced flawlessly.

They have to be fabricated in a dust-free environment with stable temperature and humidity levels in other words they have to be made in a cleanroom. A cleanroom is a room in which no more than one particle of dust larger than 0.5 micrometers is permitted in around 10 liters of air.

This is even cleaner than the air in an operating room. The ventilation filtration and supply systems in a cleanroom, therefore, have to be extremely sophisticated, several million cubic meters of air are circulated every hour and hundreds of air volume regulators maintain a constant airflow. Employees in these production areas have to abide by an extremely strict dress code. They are not permitted to smoke before work or wear any makeup or jewelry. Cleanroom production areas can only be accessed through a special airlock.

Chips are built on a base wafer cut from a silicon pool. Depending on their size several dozen or several thousand chips can be fabricated on one wafer. The surface of the wafer is oxidized in a high-temperature furnace operating at approximately 1,000 degrees Celsius to create a non-conductive layer, then a photoresist material is uniformly distributed on this non-conductive layer using centrifugal force. This coating process creates a light-sensitive layer.

The wafer is then exposed to light through the photomask in special exposure machines known as steppers, during this process coaster sized areas of the chip template known as reticles are used to transfer the complex geometric patterns of the circuit design to the silicon wafer. The exposed area of the chip patterns developed revealing the layer of oxide below, the unexposed part remains as is protecting the layer of oxide. After this, the exposed layer of oxide is etched off in the areas that have been developed using wet or plasma etching. With plasma etching, special gasses bond with the substrate to be removed in the reaction chamber. This enables microscopic layers to be removed in the windows that were exposed and developed in the previous step. Once the photoresist residue has been stripped and the wafer has been cleaned and the wafer has been cleaned, the wafer undergoes further oxidation. Electrically conductive polysilicon is deposited on this insulation layer, then the photoresist is applied again and the wafer is exposed to light through the mask. The exposed photoresist is stripped again, now the polysilicon and the thin oxide layer are etched off. These two layers only remain intact in the center under the photoresist. The next step is the doping process, where impurity atoms are introduced into the exposed silicon and an ion implanter is used to shoot impurity atoms into the silicon, this change is the conductivity of the exposed silicon by fractions of a micrometer.

After the photoresist residue has been stripped another oxide layer is applied. The wafer undergoes another cycle of applying photoresist exposure through the mask and stripping. Contact holes are etched to provide access to the conductive layers enabling the contacts and interconnections to be integrated into the wafer, this is done by depositing metal alloys onto the wafer in sputtering machines.

Once again the photoresist and mask are applied, the unexposed strips remain as is after the etching process providing a point of contact to the underlying layers. To give the insulation layer above the interconnections the smooth finish requires a chemical mechanical process used to polish away excess material with micrometer accuracy. These individual steps may be repeated multiple times in the fabrication process until the integrated circuit is complete.

Depending on the size and type of chip the wafer will contain anything from several dozen to thousands of chips. Individual chips are usually sought out of the wafer, the chips are not lined up flush with each other on the wafer because of tiny parts of the wafer splinter off during the sawing process. A certain amount of space known as the scribe line is always left between the individual chips. Test structures are also integrated with the space between the chips and used to take measurements immediately after production. These tech structures are destroyed during the sawing process. The size of the resulting chips typically varies between one square millimeter and a few square centimeters.

Final stage

The final stage of fabrication is assembly, here the individual chips are placed in a package, and terminals are attached. The result is a finished semiconductor device, which can be mounted on circuit boards using different types of terminals. Over a thousand connection contacts can be realized.

Special larger packages are used for power semiconductors intended for applications such as trains, electric cars, solar panels, and wind turbines. These power semiconductors are designed to switch electrical currents of it to 700 amps and voltages that run into the thousands. Switching at this level generates high temperatures and this heat has to be dissipated via cooling areas integrated into the packages.

Conclusion

Cutting-edge technologies are used for testing at every step in the fabrication process to ensure the highest quality levels in chip yield. Researchers and developers use scanning electron microscopes to repeatedly check the chips at different points in the production process.

If we compare today’s microelectronics with human hair, we can see just how small these devices are. The equipment used to check components and analyze defects is just as precise. These high levels of precision and quality are essential at every stage of the workflow from the production of silicon bulls through the cleaning room fabrication to quality control, in order to deliver these tiny building blocks that have such a big impact on our lives today and in the future. After all, demand is rising for innovative semiconductor solutions that make life easier, safer, and greener for technology that achieves more consumes less, and is available to everyone. Micro Electronics is the key to a better feature.

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